Search - SDRAM CONTROL

[DSP program] TMS320C6713sdram

Description: 用于完成TMS320C6713的SDRAM的控制和外围设备扩展-TMS320C6713 SDRAM used to complete the expansion of the control and peripheral equipment
Platform: | Size: 63488 | Author: 王成 | Hits:

[VHDL-FPGA-Verilog] fpga-display-bmp-pictures

Description: 本文设计的是基于大规模FPGA的BMP图库管理，完成了数码相框的一部分功能。并且本文详细地介绍了BMP图库管理的软硬件实现，即采用Altera的CyclonII系列EP2C20F484C7作为主控芯片，内嵌32位的NiosII软核，采用SDRAM作为内存，把存储在SD卡内的二进制图片信息读入内存，并控制TFT彩色液晶，读取图片数据送到液晶上显示。整个过程的所有设备都是通过Avalon总线挂在NiosII上，在NiosII的协调下正常工作。本作品最终能显示存入SD卡内的彩色图片信息，图片显示很流畅，没有延时。并且能通过4个按键分别完成图片的上翻、下翻、放大和缩小。-This design is based on the large-scale FPGA-BMP library management, and completed part of the features of digital photo frame. This paper describes the library management software and hardware to achieve BMP photos, that used the Altera s CyclonII series EP2C20F484C7 as the master chip, embedded soft-core 32-bit NiosII, the use of SDRAM for memory, SD card stored the binary picture information read into memory, and control TFT color LCD, read the image form the memory data to the LCD display. All equipment of the process hanging in the NiosII through Avalon bus, with the NiosII CPU and complete the coordination of work. Eventually the work can show the color pictures of information stored into the SD card, pictures show smoothly, and with no delay. And with 4 keys, respectively, we can make the TFT display the previous image or the next image,and make the pictures zoom in or zoom out.
Platform: | Size: 2168832 | Author: wuwei | Hits:

[VHDL-FPGA-Verilog] DE1_fat32

Description: 本文设计的是基于大规模FPGA的BMP图库管理，完成了数码相框的一部分功能。并且本文详细地介绍了BMP图库管理的软硬件实现，即采用Altera的CyclonII系列EP2C20F484C7作为主控芯片，内嵌32位的NiosII软核，采用SDRAM作为内存，把存储在SD卡内的二进制图片信息读入内存，并控制TFT彩色液晶，读取图片数据送到液晶上显示。整个过程的所有设备都是通过Avalon总线挂在NiosII上，在NiosII的协调下正常工作。本作品最终能显示存入SD卡内的彩色图片信息，图片显示很流畅，没有延时。并且能通过4个按键分别完成图片的上翻、下翻、放大和缩小。-This design is based on the large-scale FPGA-BMP library management, and completed part of the features of digital photo frame. This paper describes the library management software and hardware to achieve BMP photos, that used the Altera s CyclonII series EP2C20F484C7 as the master chip, embedded soft-core 32-bit NiosII, the use of SDRAM for memory, SD card stored the binary picture information read into memory, and control TFT color LCD, read the image form the memory data to the LCD display. All equipment of the process hanging in the NiosII through Avalon bus, with the NiosII CPU and complete the coordination of work. Eventually the work can show the color pictures of information stored into the SD card, pictures show smoothly, and with no delay. And with 4 keys, respectively, we can make the TFT display the previous image or the next image,and make the pictures zoom in or zoom out.
Platform: | Size: 11721728 | Author: wuwei | Hits:

[VHDL-FPGA-Verilog] use~Verilogtocontrol~FPGASDRAM

Description: 介绍了SDRAM的特点和工作原理，提出了一种基于FPGA的SDRAM控制器的设计方法，使用该方法实现的控制器可非常方便地对SDRAM进行控制。-Describes the characteristics and working principle of SDRAM, we propose a FPGA-based SDRAM controller design method, using the method of the controller can easily control the SDRAM.
Platform: | Size: 121856 | Author: 林曉彬 | Hits:

[VHDL-FPGA-Verilog] FPGA

Description: 基于FPGA 的SDRAM 控制器的设计方法，使用该方法实现的控制器可非常方便地对SDRAM 进行控制。-FPGA-based SDRAM controller design method, using the method of the controller can easily control the SDRAM.
Platform: | Size: 11981824 | Author: 呵呵 | Hits:

[VHDL-FPGA-Verilog] 42S83200B-16160B

Description: 详细介绍了SDRAM的时序控制，如果使用VHDL代码从SDRAM中读取数据。-Details of the SDRAM timing control, if you use VHDL code to read data from the SDRAM.
Platform: | Size: 665600 | Author: wang yong | Hits:

[Embeded Linux] gsadfgwadfgasgd

Description: 一、 uboot是ppcboot和armboot合并而成，现在主流的bootloader为uboot和redboot 二、 bootm addr_kernel addr_initrd 三、移植uboot时最好（一定）要找到一个自己板子的原形（即自己的板子是在这个板子上做一些修改而来的）的版本，这样就可以事半功倍。这样要修改的地方就比较少，也比较容易了。uboot支持很多平台，与一个具体平台相关的主要有三个地方： 1、./include/configs/xxxxx.h, 主要定义了flash、sdram的起始地址等信息，一般要修改flash的起始地址、大小，有时候会有位宽等。 2、./board/xxxxx/*，这个目录下主要有两三个.c文件，主要为该平台的初始化和flash操作的函数。有时候flash的操作需要修改，不过一般都是找一个现有的支持该flash的驱动，一般情况在uboot别的./board/平台下就会有现成的，拷贝过了就可以了。 -The design uses Mitsubishi FX2N Series PLC as a core component, eight-way Responder to complete a production control system. The system components for eight or eight players at the same time answer in Taiwan, with a total station holds the start/stop switch, answer the Start button, answer the reset button, the host quiet hint button and manually set the sub-sets of scoring buttons, etc., sub-station you have a answer in the button. The system consists of seven-segment display countdown, sub-station number, player points and the current time, temperature, and serve as driven by PLC controlled equipment. Because the system has a lot of seven-segment, so I used the dynamic scan method to reduce the number of ports. There is a buzzer to answer in the beginning, answer reset answer time out, answer in illegal, no one answer in a quiet and tips. 17 light-emitting diode, a total station is used to display and answer no answer in overtime, each sub-station to answer in two to show success and
Platform: | Size: 21504 | Author: smallwei | Hits:

[VHDL-FPGA-Verilog] MSP430F149_SDRAM

Description: 基于MSP430F149单片机的SDRAM控制程序设计-MSP430F149 microcontroller based control programming of SDRAM
Platform: | Size: 258048 | Author: 朱伟 | Hits:

[VHDL-FPGA-Verilog] sdram_control

Description: FPGA 用verilog控制sdram读写-FPGA control with verilog sdram read and write
Platform: | Size: 3486720 | Author: 扬州 | Hits:

[VHDL-FPGA-Verilog] EDAhelper

Description: 因而，SDRAM常作为数据缓存应用于高速数据传输系统中。目前，许多嵌入式设备的大容量、高速度存储器都采用SDRAM来实现，而且大多都是用专用芯片完成其控制电路，这不但提高了设计成本，而且使系统的硬件电路变得复杂。随着FPGA在嵌入式系统中的广泛应用，如果我们能够结合具体的需要，利用FPGA来设计自己的SDRAM控制器，这些问题就迎刃而解了-During University I studied computer networks have some knowledge about computers, I seriously can bear hardships and stand hard work, self-motivated. After engaging in the service industry so I have learned patience, tolerance and self-control. What a year of sales experience I learned how to communicate with people, as well as self-learning. I am a person of honor and promised to do certain things other people do. Into action to appreciate the language of the people, hate the language into action.
Platform: | Size: 75776 | Author: 宁欣 | Hits:

[VHDL-FPGA-Verilog] SDRAM_RaW

Description: 本实例用于控制开发板上面的SDRAM完成读写功能；先向SDRAM里面写数据，然后再将数据读出来做比较，如果不匹配就通过LED变亮显示出来，如果一致，LED就不亮。-This instance is used to control the development board to complete the above SDRAM read and write capabilities first SDRAM write data inside, and then compare the data read out, if you do not match on the adoption of LED lights show, if consistent, LED is not lit.
Platform: | Size: 2151424 | Author: myname | Hits:

[VHDL-FPGA-Verilog] DDR3_user_design

Description: 在Xilinx开发环境ISE13.2上用MIG产生的DDR3 SDRAM控制器，里面生成了Core，可用于DDR3读写控制-On the Xilinx development environment ISE13.2 generated with MIG DDR3 SDRAM controller, which generates the Core, DDR3 can be used to read and write control
Platform: | Size: 243712 | Author: 吴言 | Hits:

[VHDL-FPGA-Verilog] sdram_mdl

Description: FPGA控制SDRAM的工程，是用Verilog写的，很好用-FPGA to control the SDRAM project is written in Verilog, easy to use
Platform: | Size: 2520064 | Author: laiqingsong | Hits:

[Other] SDRAM_verilog

Description: 关于FPGA控制SDRAM笔记详细的资料，verilog写的程序，注释也很详细，值得参考。-FPGA control SDRAM notes detailed information, the program written in Verilog, comments are also detailed, it is also useful.
Platform: | Size: 44032 | Author: 张亚洲 | Hits:

[DSP program] DSPRobotPVision(3)

Description: 一些关于机器人方面的资料，包括：DSP片外高速海量SDRAM存储系统设计、机器人视觉（Robot Vision）简介、基于DSP的爬行机器人主控制模块设计履带式管道清洁机器人嵌入式控制与通信系统的研究、线阵CCD图像传感器驱动电路的设计-Information about the robots, including: high-speed mass DSP-chip SDRAM memory system design, robot vision (Robot Vision) Profile-based DSP-crawling robot main control module is designed crawler pipeline cleaning robot embedded control and communications systems, linear CCD image sensor drive circuit design
Platform: | Size: 3864576 | Author: liumei | Hits:

[VHDL-FPGA-Verilog] sdram_mdl

Description: FPGA 控制SDRAM读写，通过按键控制读写操作，读出之后发送到串口显示到电脑终端。-FPGA to control the SDRAM read and write, read and write operations by the key control to read out is sent to the serial port to display to the computer terminal.
Platform: | Size: 8511488 | Author: guoguobiao | Hits:

[VHDL-FPGA-Verilog] sdram_me

Description: 用verilog代码控制sdram,sdram_module是顶层模块。控制8M x 16bits x4Banks sdram. -use verilog program to control the sdram
Platform: | Size: 10240 | Author: 张君 | Hits:

[VHDL-FPGA-Verilog] SDRAM_VerilogHDL

Description: SDRAM的VerilogHDL程序，FPGA控制执行。-SDRAM VerilogHDL program, FPGA control implementation.
Platform: | Size: 4096 | Author: 赵峰 | Hits:

[Other] sdram_mdl

Description: SDRAM的verilog程序控制模块，希望对大家有帮助-SDRAM verilog program control module, we want to help
Platform: | Size: 2196480 | Author: yxm | Hits:

[Other] SD_SDRAM_LCM_PROJECT

Description: verilog控制SD卡与SDRAM之间数据传输及LCM显示，希望对大家有帮助-The verilog Control SD card with SDRAM between data transmission and LCM hope everyone
Platform: | Size: 3490816 | Author: yxm | Hits:

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[DSP program] TMS320C6713sdram

[VHDL-FPGA-Verilog] fpga-display-bmp-pictures

[VHDL-FPGA-Verilog] DE1_fat32

[VHDL-FPGA-Verilog] use~Verilogtocontrol~FPGASDRAM

[VHDL-FPGA-Verilog] FPGA

[VHDL-FPGA-Verilog] 42S83200B-16160B

[Embeded Linux] gsadfgwadfgasgd

[VHDL-FPGA-Verilog] MSP430F149_SDRAM

[VHDL-FPGA-Verilog] sdram_control

[VHDL-FPGA-Verilog] EDAhelper

[VHDL-FPGA-Verilog] SDRAM_RaW

[VHDL-FPGA-Verilog] DDR3_user_design

[VHDL-FPGA-Verilog] sdram_mdl

[Other] SDRAM_verilog

[DSP program] DSPRobotPVision(3)

[VHDL-FPGA-Verilog] sdram_mdl

[VHDL-FPGA-Verilog] sdram_me

[VHDL-FPGA-Verilog] SDRAM_VerilogHDL

[Other] sdram_mdl

[Other] SD_SDRAM_LCM_PROJECT

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